Fix up naming and parsing of files with variants
This commit is contained in:
@@ -42,14 +42,14 @@ outputs:
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type: pdf_sch_print
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type: pdf_sch_print
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dir: .
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dir: .
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options:
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options:
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output: "%f%v_%r_%i.%x"
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output: "%f_%r%v_%i.%x"
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- name: 'print_pcb'
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- name: 'print_pcb'
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comment: "Print Top and Bottom Copper+Silk"
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comment: "Print Top and Bottom Copper+Silk"
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type: pcb_print
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type: pcb_print
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dir: .
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dir: .
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options:
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options:
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output: "%f%v_%r_PCB.%x"
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output: "%f_%r%v_PCB.%x"
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pages:
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pages:
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- layers:
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- layers:
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- layer: F.Cu
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- layer: F.Cu
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@@ -81,7 +81,7 @@ outputs:
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- field: References
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- field: References
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name: refs
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name: refs
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exclude_filter: ""
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exclude_filter: ""
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output: "%f%v_%r_%i.%x"
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output: "%f_%r%v_%i.%x"
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expand_text_vars: true
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expand_text_vars: true
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- name: 'bom_csv'
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- name: 'bom_csv'
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@@ -105,7 +105,7 @@ outputs:
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- field: References
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- field: References
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name: refs
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name: refs
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exclude_filter: ""
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exclude_filter: ""
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output: "%f%v_%r_%i.%x"
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output: "%f_%r%v_%i.%x"
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expand_text_vars: true
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expand_text_vars: true
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csv:
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csv:
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separator: ';'
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separator: ';'
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@@ -134,7 +134,7 @@ outputs:
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- field: References
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- field: References
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name: refs
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name: refs
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exclude_filter: ""
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exclude_filter: ""
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output: "%f%v_%r_%i.%x"
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output: "%f_%r%v_%i.%x"
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expand_text_vars: true
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expand_text_vars: true
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xlsx:
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xlsx:
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hide_pcb_info: true
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hide_pcb_info: true
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@@ -152,7 +152,7 @@ outputs:
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type: step
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type: step
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dir: .
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dir: .
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options:
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options:
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output: '%f%v_%r.%x'
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output: '%f_%r%v.%x'
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download: false
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download: false
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subst_models: true
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subst_models: true
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@@ -168,7 +168,7 @@ outputs:
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download: false
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download: false
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download_lcsc: false
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download_lcsc: false
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orthographic: true
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orthographic: true
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output: 'PCB_%f%v_%r.%x'
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output: 'PCB_%f_%r%v.%x'
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show_components: 'none'
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show_components: 'none'
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- name: 'pcba_render'
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- name: 'pcba_render'
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@@ -183,14 +183,14 @@ outputs:
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zoom: -1
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zoom: -1
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download_lcsc: false
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download_lcsc: false
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orthographic: true
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orthographic: true
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output: 'PCBA_%f%v_%r.%x'
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output: 'PCBA_%f_%r%v.%x'
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show_components: 'all'
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show_components: 'all'
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- name: 'neo_position'
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- name: 'neo_position'
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comment: "Pick and place"
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comment: "Pick and place"
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type: position
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type: position
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options:
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options:
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output: '%f%v_%r_cpl.%x'
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output: '%f_%r%v_cpl.%x'
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format: CSV
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format: CSV
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units: millimeters
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units: millimeters
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separate_files_for_front_and_back: false
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separate_files_for_front_and_back: false
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@@ -201,7 +201,7 @@ outputs:
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type: stencil_3d
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type: stencil_3d
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dir: '3D_Stencil'
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dir: '3D_Stencil'
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options:
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options:
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output: '%f%v_%r_%i.%x'
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output: '%f_%r%v_%i.%x'
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- name: 'diff_pcb'
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- name: 'diff_pcb'
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comment: "Diff for visual comparison"
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comment: "Diff for visual comparison"
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@@ -225,7 +225,7 @@ outputs:
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type: ibom
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type: ibom
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dir: .
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dir: .
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options:
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options:
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output: '%f%v_%r_%i.%x'
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output: '%f_%r%v_%i.%x'
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dark_mode: true
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dark_mode: true
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- name: 'JLCPCB_gerbers'
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- name: 'JLCPCB_gerbers'
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@@ -278,7 +278,7 @@ outputs:
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metric_units: true
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metric_units: true
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map: gerber
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map: gerber
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route_mode_for_oval_holes: false
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route_mode_for_oval_holes: false
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output: "%f%v_%r_%i.%x"
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output: "%f_%r%v_%i.%x"
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- name: 'JLCPCB_compress'
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- name: 'JLCPCB_compress'
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comment: ZIP file for JLCPCB
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comment: ZIP file for JLCPCB
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@@ -289,7 +289,7 @@ outputs:
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dest: /
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dest: /
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- from_output: JLCPCB_drill
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- from_output: JLCPCB_drill
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dest: /
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dest: /
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output: '%f%v_%r_JLC.%x'
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output: '%f_%r%v_JLC.%x'
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groups:
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groups:
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- name: mech
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- name: mech
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outputs:
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outputs:
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@@ -4,7 +4,7 @@ kibot:
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import:
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import:
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- file: default.kibot.yaml
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- file: default.kibot.yaml
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outputs: ['step']
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outputs: ['step', 'pcb_render']
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preflight:
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preflight:
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erc: false
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erc: false
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@@ -157,12 +157,11 @@ image:
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for f in $FILES
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for f in $FILES
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do
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do
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echo $f
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echo $f
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name=$(echo $f | cut -c3- | cut -d'-' -f1)A
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rev=$(echo $f | cut -c3- | cut -d'-' -f1)A
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fab_path=$CI_PROJECT_DIR/Fabrication/$(dirname $f | cut -c3-)
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fab_path=$CI_PROJECT_DIR/Fabrication/$(dirname $f | cut -c3-)
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name_n_rev=$(echo $f | cut -c3- | rev | cut -d'/' -f1 | cut -c9- | rev)
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name_n_rev=$(echo $f | cut -c3- | rev | cut -d'/' -f1 | cut -c9- | rev)
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echo "name: $name_n_rev"
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echo "name: $name_n_rev"
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assembly_rev=$(echo $name_n_rev | cut -d'_' -f2)
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assembly_rev=$(echo $name_n_rev | cut -d'_' -f2)
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name=$(echo $name_n_rev | cut -d'_' -f1)A$(echo ${name_n_rev//$assembly_rev/.} | cut -d'.' -f2)
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pcb_rev=$(echo $assembly_rev | cut -d'_' -f1,2 | cut -d'.' -f1,2)
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pcb_rev=$(echo $assembly_rev | cut -d'_' -f1,2 | cut -d'.' -f1,2)
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pcb_im=$fab_path/PCB_$name_n_rev.png
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pcb_im=$fab_path/PCB_$name_n_rev.png
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pcba_im=$fab_path/PCBA_$name_n_rev.png
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pcba_im=$fab_path/PCBA_$name_n_rev.png
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