Fix up naming and parsing of files with variants

This commit is contained in:
andrewc
2025-07-25 15:36:42 +10:00
parent e9f401a204
commit 6b1e4b44c4
3 changed files with 15 additions and 16 deletions

View File

@@ -42,14 +42,14 @@ outputs:
type: pdf_sch_print
dir: .
options:
output: "%f%v_%r_%i.%x"
output: "%f_%r%v_%i.%x"
- name: 'print_pcb'
comment: "Print Top and Bottom Copper+Silk"
type: pcb_print
dir: .
options:
output: "%f%v_%r_PCB.%x"
output: "%f_%r%v_PCB.%x"
pages:
- layers:
- layer: F.Cu
@@ -81,7 +81,7 @@ outputs:
- field: References
name: refs
exclude_filter: ""
output: "%f%v_%r_%i.%x"
output: "%f_%r%v_%i.%x"
expand_text_vars: true
- name: 'bom_csv'
@@ -105,7 +105,7 @@ outputs:
- field: References
name: refs
exclude_filter: ""
output: "%f%v_%r_%i.%x"
output: "%f_%r%v_%i.%x"
expand_text_vars: true
csv:
separator: ';'
@@ -134,7 +134,7 @@ outputs:
- field: References
name: refs
exclude_filter: ""
output: "%f%v_%r_%i.%x"
output: "%f_%r%v_%i.%x"
expand_text_vars: true
xlsx:
hide_pcb_info: true
@@ -152,7 +152,7 @@ outputs:
type: step
dir: .
options:
output: '%f%v_%r.%x'
output: '%f_%r%v.%x'
download: false
subst_models: true
@@ -168,7 +168,7 @@ outputs:
download: false
download_lcsc: false
orthographic: true
output: 'PCB_%f%v_%r.%x'
output: 'PCB_%f_%r%v.%x'
show_components: 'none'
- name: 'pcba_render'
@@ -183,14 +183,14 @@ outputs:
zoom: -1
download_lcsc: false
orthographic: true
output: 'PCBA_%f%v_%r.%x'
output: 'PCBA_%f_%r%v.%x'
show_components: 'all'
- name: 'neo_position'
comment: "Pick and place"
type: position
options:
output: '%f%v_%r_cpl.%x'
output: '%f_%r%v_cpl.%x'
format: CSV
units: millimeters
separate_files_for_front_and_back: false
@@ -201,7 +201,7 @@ outputs:
type: stencil_3d
dir: '3D_Stencil'
options:
output: '%f%v_%r_%i.%x'
output: '%f_%r%v_%i.%x'
- name: 'diff_pcb'
comment: "Diff for visual comparison"
@@ -225,7 +225,7 @@ outputs:
type: ibom
dir: .
options:
output: '%f%v_%r_%i.%x'
output: '%f_%r%v_%i.%x'
dark_mode: true
- name: 'JLCPCB_gerbers'
@@ -278,7 +278,7 @@ outputs:
metric_units: true
map: gerber
route_mode_for_oval_holes: false
output: "%f%v_%r_%i.%x"
output: "%f_%r%v_%i.%x"
- name: 'JLCPCB_compress'
comment: ZIP file for JLCPCB
@@ -289,7 +289,7 @@ outputs:
dest: /
- from_output: JLCPCB_drill
dest: /
output: '%f%v_%r_JLC.%x'
output: '%f_%r%v_JLC.%x'
groups:
- name: mech
outputs:

View File

@@ -4,7 +4,7 @@ kibot:
import:
- file: default.kibot.yaml
outputs: ['step']
outputs: ['step', 'pcb_render']
preflight:
erc: false

View File

@@ -157,12 +157,11 @@ image:
for f in $FILES
do
echo $f
name=$(echo $f | cut -c3- | cut -d'-' -f1)A
rev=$(echo $f | cut -c3- | cut -d'-' -f1)A
fab_path=$CI_PROJECT_DIR/Fabrication/$(dirname $f | cut -c3-)
name_n_rev=$(echo $f | cut -c3- | rev | cut -d'/' -f1 | cut -c9- | rev)
echo "name: $name_n_rev"
assembly_rev=$(echo $name_n_rev | cut -d'_' -f2)
name=$(echo $name_n_rev | cut -d'_' -f1)A$(echo ${name_n_rev//$assembly_rev/.} | cut -d'.' -f2)
pcb_rev=$(echo $assembly_rev | cut -d'_' -f1,2 | cut -d'.' -f1,2)
pcb_im=$fab_path/PCB_$name_n_rev.png
pcba_im=$fab_path/PCBA_$name_n_rev.png