3 Commits

Author	SHA1	Message	Date
andrewc	acd0758622	CI: set aux origin of each pcb to bottom left	2023-10-23 15:45:08 +10:00
andrewc	5f290a1b06	Directory mapping corrected ... JLC compress output now works Fixed up xlsx bom Renamed pcb print output	2023-10-20 21:28:57 +10:00
andrewc	1e23a32622	Renamed .gitmodules to gitmodules, and .gitlab-ci.yml to kibot-ci.yml ... Updated default.kibot.yaml and kibot-ci.yml to match DS. Added ci yaml to be copied to the root of the kicad proj, it just includes kibot-ci.yml	2023-10-19 20:57:55 +10:00