Directory mapping corrected

JLC compress output now works
Fixed up xlsx bom
Renamed pcb print output
This commit is contained in:
andrewc
2023-10-20 21:28:57 +10:00
parent c05f45bffb
commit 5f290a1b06
2 changed files with 29 additions and 21 deletions

View File

@@ -4,10 +4,6 @@ kibot:
import:
- file: JLCPCB
definitions:
_KIBOT_POS_ENABLED: false
_KIBOT_BOM_ENABLED: false
_KIBOT_MANF_DIR_COMP: "%f-%r"
preflight:
run_erc: true
@@ -29,6 +25,7 @@ global:
environment:
user_templates: "${CI_PROJECT_DIR}/.gitlab"
outputs:
- name: 'print_sch'
comment: "Print schematic (PDF)"
@@ -42,7 +39,7 @@ outputs:
type: pcb_print
dir: .
options:
output: "%f_%r_%i.%x"
output: "%f_%r_PCB.%x"
pages:
- layers:
- layer: F.Cu
@@ -69,6 +66,8 @@ outputs:
- field: References
name: refs
exclude_filter: ""
output: "%f_%r_%i.%x"
expand_text_vars: true
disable_run_by_default: true
- name: 'bom_csv'
@@ -81,7 +80,6 @@ outputs:
hide_pcb_info: true
hide_stats_info: true
format: "CSV"
output: "%f_%r_%i.%x"
- name: 'bom_xlsx'
type: bom
@@ -89,10 +87,11 @@ outputs:
extends: '_bom'
options:
xlsx:
logo: "${CI_PROJECT_DIR}/.gitlab/micromelon_default/meta/icon.png"
# this is a relative path unfortunately
logo: "../.gitlab/micromelon_default/meta/icon.png"
hide_pcb_info: true
hide_stats_info: true
format: "xlsx"
format: "XLSX"
# - name: 'drill'
# comment: "excellon drill files"
@@ -122,7 +121,7 @@ outputs:
- name: 'stencil'
comment: '3D printable stencil for when you forgot to order it'
type: stencil_3d
dir: '3D Stencil'
dir: '3D_Stencil'
options:
output: '%f_%r_%i.%x'
@@ -142,11 +141,18 @@ outputs:
only_different: true
pcb: false
old: KIBOT_TAG-0
- name: 'JLCPCB_compress'
type: compress
extends: _JLCPCB_compress
options:
output: '%f_%r_JLC.%x'
groups:
- name: pcb
outputs:
- _JLCPCB_compress
- JLCPCB_compress
- neo_position
- print_pcb
- stencil
@@ -156,3 +162,8 @@ groups:
- bom_csv
- bom_xlsx
- print_sch
...
definitions:
_KIBOT_POS_ENABLED: false
_KIBOT_BOM_ENABLED: false
_KIBOT_MANF_DIR_COMP: "."