CI updated to actually work with multi schem projs

Git submodules tested and working using .gitmodules file Made test template
2023-01-18 18:25:49 +10:00
parent bbed40ccc5
commit 40737327a0
6 changed files with 26 additions and 3 deletions
--- a/test/.gitmodules
+++ b/test/.gitmodules
@@ -0,0 +1,3 @@
+[submodule "libs/melonlib"]
+	path = libs/melonlib
+	url = git@gitlab.com:Micromelon/education/hardware/micromelon-kicadlibs.git
--- a/test/meta/info.html
+++ b/test/meta/info.html
@@ -0,0 +1,22 @@
+<!DOCTYPE HTML PUBLIC "-//W3C//DTD HTML 4.0 Transitional//EN">
+<HTML>
+<HEAD>
+<META HTTP-EQUIV="CONTENT-TYPE" CONTENT="text/html;
+charset=windows-1252">
+<TITLE>Raspberry Pi - Expansion Board</TITLE>
+</HEAD>
+<BODY LANG="fr-FR" DIR="LTR">
+<P>This project template is the basis of an expansion board for the
+<A HREF="http://www.raspberrypi.org/" TARGET="blank">Raspberry Pi $25
+ARM board.</A> <BR><BR>This base project includes a PCB edge defined
+as the same size as the Raspberry-Pi PCB with the connectors placed
+correctly to align the two boards. All IO present on the Raspberry-Pi
+board is connected to the project through the 0.1&quot; expansion
+headers. <BR><BR>The board outline looks like the following:
+</P>
+<P><IMG SRC="brd.png" NAME="brd" ALIGN=BOTTOM WIDTH=680 HEIGHT=378
+BORDER=0><BR><BR><BR><BR>
+</P>
+<P>(c)2012 Brian Sidebotham<BR>(c)2012 KiCad Developers</P>
+</BODY>
+</HTML>
--- a/test/proj.kicad_pcb
+++ b/test/proj.kicad_pcb
@@ -0,0 +1,2 @@
+(kicad_pcb (version 20211014) (generator pcbnew)
+)
--- a/test/proj.kicad_pro
+++ b/test/proj.kicad_pro
@@ -0,0 +1,82 @@
+{
+  "board": {
+    "design_settings": {
+      "defaults": {
+        "board_outline_line_width": 0.1,
+        "copper_line_width": 0.2,
+        "copper_text_size_h": 1.5,
+        "copper_text_size_v": 1.5,
+        "copper_text_thickness": 0.3,
+        "other_line_width": 0.15,
+        "silk_line_width": 0.15,
+        "silk_text_size_h": 1.0,
+        "silk_text_size_v": 1.0,
+        "silk_text_thickness": 0.15
+      },
+      "diff_pair_dimensions": [],
+      "drc_exclusions": [],
+      "rules": {
+        "min_copper_edge_clearance": 0.0,
+        "solder_mask_clearance": 0.0,
+        "solder_mask_min_width": 0.0
+      },
+      "track_widths": [],
+      "via_dimensions": []
+    },
+    "layer_presets": []
+  },
+  "boards": [],
+  "cvpcb": {
+    "equivalence_files": []
+  },
+  "libraries": {
+    "pinned_footprint_libs": [],
+    "pinned_symbol_libs": []
+  },
+  "meta": {
+    "filename": "proj.kicad_pro",
+    "version": 1
+  },
+  "net_settings": {
+    "classes": [
+      {
+        "bus_width": 12.0,
+        "clearance": 0.2,
+        "diff_pair_gap": 0.25,
+        "diff_pair_via_gap": 0.25,
+        "diff_pair_width": 0.2,
+        "line_style": 0,
+        "microvia_diameter": 0.3,
+        "microvia_drill": 0.1,
+        "name": "Default",
+        "pcb_color": "rgba(0, 0, 0, 0.000)",
+        "schematic_color": "rgba(0, 0, 0, 0.000)",
+        "track_width": 0.25,
+        "via_diameter": 0.8,
+        "via_drill": 0.4,
+        "wire_width": 6.0
+      }
+    ],
+    "meta": {
+      "version": 2
+    },
+    "net_colors": null
+  },
+  "pcbnew": {
+    "last_paths": {
+      "gencad": "",
+      "idf": "",
+      "netlist": "",
+      "specctra_dsn": "",
+      "step": "",
+      "vrml": ""
+    },
+    "page_layout_descr_file": ""
+  },
+  "schematic": {
+    "legacy_lib_dir": "",
+    "legacy_lib_list": []
+  },
+  "sheets": [],
+  "text_variables": {}
+}
--- a/test/proj.kicad_sch
+++ b/test/proj.kicad_sch
@@ -0,0 +1,5 @@
+(kicad_sch (version 20211123) (generator eeschema)
+  (paper "A4")
+  (lib_symbols)
+  (symbol_instances)
+)